[WIP] hw: Integrate PULP Cluster in Cluster domain (not compiling atm)
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (22)
hw/include/pulp_soc_defines.sv|19 col 3| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/include/pulp_soc_defines.sv|42 col 7| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/include/pulp_interfaces.sv|13 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|47 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|49 col 14| Explicitly define a storage type for every parameter and localparam, (ID_WIDTH). [Style: constants] [explicit-parameter-storage-type]
hw/include/pulp_interfaces.sv|84 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|171 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|245 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|247 col 14| Explicitly define a storage type for every parameter and localparam, (ID_WIDTH). [Style: constants] [explicit-parameter-storage-type]
hw/include/pulp_interfaces.sv|282 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|321 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/include/pulp_interfaces.sv|409 col 11| Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
hw/chimera_cluster.sv|296 col 54| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/chimera_cluster.sv|324 col 101| Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
hw/chimera_cluster.sv|339 col 101| Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
hw/chimera_cluster.sv|340 col 101| Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
hw/chimera_cluster.sv|386 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/chimera_cluster.sv|387 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/chimera_cluster.sv|388 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/chimera_cluster.sv|389 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/chimera_cluster.sv|390 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/chimera_cluster.sv|391 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Filtered Findings (0)
Annotations
Check warning on line 19 in hw/include/pulp_soc_defines.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_soc_defines.sv#L19
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"hw/include/pulp_soc_defines.sv" range:{start:{line:19 column:3}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:19 column:3} end:{line:20}} text:" *\n"}
Check warning on line 42 in hw/include/pulp_soc_defines.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_soc_defines.sv#L42
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"hw/include/pulp_soc_defines.sv" range:{start:{line:42 column:7}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:42 column:7} end:{line:43}} text:"`endif\n"}
Check warning on line 13 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L13
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:13 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 47 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L47
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:47 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 49 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L49
Explicitly define a storage type for every parameter and localparam, (ID_WIDTH). [Style: constants] [explicit-parameter-storage-type]
Raw output
message:"Explicitly define a storage type for every parameter and localparam, (ID_WIDTH). [Style: constants] [explicit-parameter-storage-type]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:49 column:14}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 84 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L84
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:84 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 171 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L171
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:171 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 245 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L245
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:245 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 247 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L247
Explicitly define a storage type for every parameter and localparam, (ID_WIDTH). [Style: constants] [explicit-parameter-storage-type]
Raw output
message:"Explicitly define a storage type for every parameter and localparam, (ID_WIDTH). [Style: constants] [explicit-parameter-storage-type]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:247 column:14}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 282 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L282
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:282 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 321 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L321
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:321 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 409 in hw/include/pulp_interfaces.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/include/pulp_interfaces.sv#L409
Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]
Raw output
message:"Interface name does not match the naming convention defined by regex pattern: [a-z_0-9]+(_if) [Style: interface-conventions] [interface-name-style]" location:{path:"hw/include/pulp_interfaces.sv" range:{start:{line:409 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 296 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L296
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:296 column:54}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:296 column:54} end:{line:297}} text:" .clu_narrow_in_resp_i (clu_axi_adapter_slv_resp),\n"}
Check warning on line 324 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L324
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:324 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 339 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L339
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:339 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 340 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L340
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:340 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 386 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L386
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:386 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 387 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L387
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:387 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 388 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L388
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:388 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 389 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L389
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:389 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 390 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L390
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:390 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 391 in hw/chimera_cluster.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/chimera_cluster.sv#L391
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/chimera_cluster.sv" range:{start:{line:391 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}