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frontend: increase BufferDepth
deploy #153: Commit a31f804 pushed by LuziLucia
December 13, 2024 11:07 21s luzil/baseline
December 13, 2024 11:07 21s
frontend: larger reorder buffer
deploy #152: Commit fe85846 pushed by LuziLucia
December 12, 2024 19:52 40s luzil/baseline
December 12, 2024 19:52 40s
frontend: added signals for init and obi
deploy #150: Commit 84ba109 pushed by LuziLucia
December 9, 2024 14:36 38s luzil/interl
December 9, 2024 14:36 38s
December 5, 2024 09:39 39s
Minor lint fixes for trailing spaces, gen_ labels, line length
deploy #145: Commit 28a39a0 pushed by thommythomaso
December 2, 2024 15:56 26m 29s master
December 2, 2024 15:56 26m 29s
legalizer: Ensure correct PageAddrWidth without bursts (fixes #51)
deploy #143: Commit ea201b0 pushed by thommythomaso
December 2, 2024 15:51 25m 15s master
December 2, 2024 15:51 25m 15s
tracer: Improve capabilities for Snitch, fix smaller issues
deploy #141: Commit 110fd06 pushed by thommythomaso
December 2, 2024 15:34 41s master
December 2, 2024 15:34 41s
ci: Update actions/upload-artifact to v4
deploy #139: Commit 780b64d pushed by thommythomaso
December 2, 2024 15:15 1m 29s master
December 2, 2024 15:15 1m 29s
December 2, 2024 14:55 53s
December 2, 2024 12:44 36s
December 2, 2024 11:09 46s
fix add signal otherwise the chesire build will fail
deploy #134: Commit 837754d pushed by Lura518
November 30, 2024 18:45 24s smmu-raroth
November 30, 2024 18:45 24s
fix typo
deploy #133: Commit f6ae9be pushed by Lura518
November 30, 2024 18:30 30s smmu-raroth
November 30, 2024 18:30 30s
November 30, 2024 18:16 42s
add rw idma variant
deploy #131: Commit 0110aca pushed by LuziLucia
November 28, 2024 15:12 48s luzil/interl
November 28, 2024 15:12 48s
fix lowercase register names
deploy #130: Commit 864e6af pushed by Lura518
November 28, 2024 10:45 35s smmu-raroth
November 28, 2024 10:45 35s
fix (reg-tpl) Signals not found - Use the .q subfield
deploy #129: Commit 85c45ac pushed by Lura518
November 28, 2024 09:39 47s smmu-raroth
November 28, 2024 09:39 47s