Update CHANGELOG.md #2104

Job	Run time
check-opcodes	5s
riscv-isa-sim	7s
tc-gcc	24s
check-control-registers	20s
verilator	7s
tc-llvm	49s
verilator-model (minpool)	7s
verilator-model (mempool)	14s
build-apps-gcc (minpool)	1m 37s
check-bootrom	12s
build-apps-gcc (mempool)	1m 35s
unit-test	2m 7s
build-apps-llvm (minpool)	1m 36s
tc-halide	13s
build-apps-llvm (mempool)	1m 35s
build-apps-halide (minpool)	1m 20s
build-apps-halide (mempool)	1m 38s
run-apps-gcc (minpool)	39s
run-apps-gcc (mempool)	2m 42s
run-apps-llvm (minpool)	42s
run-apps-llvm (mempool)	2m 36s
run-apps-halide (minpool)	54s
run-apps-halide (mempool)	3m 16s
clean-up	5s
clean-up-compile-runs (minpool)	3s
clean-up-compile-runs (mempool)	4s
	25m 7s

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