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[MemPool-Spatz][TCDM ACK Handling Fix]
1. Add `wen` field in response signal of tcdm to distinguish the store/load response. 2. Fix a bug in runtime/arch.ld.c that the L1 size is not configured correctly for Spatz cfgs. 3. Add more configs for TeraPool-Spatz. 4. Other small bug fixes.
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msc23h24 Diyou Shen (dishen)
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Jan 5, 2024
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# Copyright 2021 ETH Zurich and University of Bologna. | ||
# Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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# Author: Matheus Cavalcante, ETH Zurich | ||
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############### | ||
## MemPool ## | ||
############### | ||
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# Number of cores | ||
num_cores ?= 128 | ||
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# Number of groups | ||
num_groups ?= 4 | ||
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# Number of cores per MemPool tile | ||
num_cores_per_tile ?= 2 | ||
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# L1 scratchpad banking factor | ||
banking_factor ?= 4 | ||
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# Radix for hierarchical AXI interconnect | ||
axi_hier_radix ?= 20 | ||
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# Number of AXI masters per group | ||
axi_masters_per_group ?= 1 | ||
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# Activate Spatz and RVV | ||
spatz ?= 1 | ||
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# Lenght of single vector register | ||
vlen ?= 256 | ||
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# Number of IPUs | ||
n_ipu ?= 2 | ||
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n_fpu ?= 2 | ||
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# Deactivate the XpulpIMG extension | ||
xpulpimg ?= 0 | ||
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rvf ?= 1 | ||
rvd ?= 0 |
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# Copyright 2021 ETH Zurich and University of Bologna. | ||
# Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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# Author: Matheus Cavalcante, ETH Zurich | ||
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################ | ||
## TeraPool ## | ||
################ | ||
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# Global Control | ||
terapool ?= 1 | ||
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# Number of cores | ||
num_cores ?= 512 | ||
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# Number of groups | ||
num_groups ?= 4 | ||
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# Number of cores per Terapool tile | ||
num_cores_per_tile ?= 4 | ||
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# Number of sub groups per Terapool group | ||
num_sub_groups_per_group ?= 4 | ||
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# L1 scratchpad banking factor | ||
banking_factor ?= 4 | ||
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# Access latency between remote groups | ||
# Options: "7", "9" or "11": | ||
remote_group_latency_cycles ?= 7 | ||
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# Radix for hierarchical AXI interconnect | ||
axi_hier_radix ?= 9 | ||
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# Number of AXI masters per group | ||
axi_masters_per_group ?= 4 | ||
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# Number of DMA backends in each group | ||
dmas_per_group ?= 4 | ||
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# L2 Banks/Channels | ||
l2_banks = 16 | ||
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# Makefile RTL Filtering Control | ||
subgroup_rtl = 1 | ||
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# Activate Spatz and RVV | ||
spatz ?= 1 | ||
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# Lenght of single vector register | ||
vlen ?= 256 | ||
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# Number of IPUs | ||
n_ipu ?= 2 | ||
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n_fpu ?= 2 | ||
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# Deactivate the XpulpIMG extension | ||
xpulpimg ?= 0 | ||
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rvf ?= 1 |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,62 @@ | ||
# Copyright 2021 ETH Zurich and University of Bologna. | ||
# Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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||
# Author: Matheus Cavalcante, ETH Zurich | ||
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################ | ||
## TeraPool ## | ||
################ | ||
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# Global Control | ||
terapool ?= 1 | ||
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# Number of cores | ||
num_cores ?= 128 | ||
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# Number of groups | ||
num_groups ?= 4 | ||
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# Number of cores per Terapool tile | ||
num_cores_per_tile ?= 1 | ||
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# Number of sub groups per Terapool group | ||
num_sub_groups_per_group ?= 4 | ||
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# L1 scratchpad banking factor | ||
banking_factor ?= 4 | ||
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# Access latency between remote groups | ||
# Options: "7", "9" or "11": | ||
remote_group_latency_cycles ?= 7 | ||
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# Radix for hierarchical AXI interconnect | ||
axi_hier_radix ?= 9 | ||
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# Number of AXI masters per group | ||
axi_masters_per_group ?= 4 | ||
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# Number of DMA backends in each group | ||
dmas_per_group ?= 4 | ||
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# L2 Banks/Channels | ||
l2_banks = 16 | ||
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# Makefile RTL Filtering Control | ||
subgroup_rtl = 1 | ||
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# Activate Spatz and RVV | ||
spatz ?= 1 | ||
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# Lenght of single vector register | ||
vlen ?= 1024 | ||
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# Number of IPUs | ||
n_ipu ?= 8 | ||
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n_fpu ?= 8 | ||
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# Deactivate the XpulpIMG extension | ||
xpulpimg ?= 0 | ||
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rvf ?= 1 |
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Submodule cluster_interconnect
updated
1 files
+44 −4 | rtl/variable_latency_interconnect/variable_latency_interconnect.sv |
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Submodule spatz
updated
from 5e854f to 320383
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