Update based on Rev0.5 feedbacks

[AoteJin]

• Wording update
  • Typo fixes
  • General update to improve clearance
  • Replace "submachine" to "supervisor domain"
  • Replace "machine mode" to "M-mode"
  • Add notes to clarify the scenario when the debug control changes dynamically in section 3.1
  • Add notes to elaborate on dmode in in section 3.3.1
• Add a list to summarize the changes made to debug and trace spec in chapter 1
• Add Terminology in section 1.1
• Abstract Command without halting cause cmderr set to 6 in section 3.1
• Include memory access without halting behavior in section 3.1
• Make stepie accessible in debug mode and only affect the interrupt delegated to debug-allowed privilege in section 3.1.5
• Add description for conditions where triggers are not configurable in section 3.3
• Define that the external trigger inputs are constrained by source from where it is generated in section 3.3.2
• Fix access privilege for tcontrol, scontext, hcontext, mcontext, and mscontext in section 3.3.4
• The dcsr fields access rule is determined by debug control knobs instead of debug access privilege in section 3.4.1
• Extend and the extension discovery method in section 4.1
• Halt-on-reset will be pending till first debuggable instruction in section 4.3
• Keepalive will not raise error in section 4.4
• Change error status to be sticky and add acksecfault bit to clear error status in section 4.7
• Change spec name from "RISC-V External Debug Security Extension" to "RISC-V External Debug Security Specification"
• Update copyright
• Update reference