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Pull requests: riscv-software-src/riscv-isa-sim

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Pull requests list

Add Shlcofideleg support
#1847 opened Oct 31, 2024 by demin-han Loading…
2
Print values of involved registers in an instruction before and after of its execution
#1842 opened Oct 23, 2024 by ahmedshakill Loading…
1
Add instruction limit
#1828 opened Oct 4, 2024 by Timmmm Loading…
2
ADD: a basic BTM N-trace spec compliant trace encoder model
#1824 opened Sep 30, 2024 by iansseijelly Loading…
26
Fix vleff: reduce VL if trigger fired on a later element.
#1818 opened Sep 26, 2024 by NewPaulWalker Loading…
[#1548][vector crypto] adding register index LMUL alignement checks
#1815 opened Sep 25, 2024 by nibrunieAtSi5 Loading…
4
Fix dtc_output read when interrupted by EINTR
#1801 opened Sep 10, 2024 by MarcoBonino Loading…
3
README.md: update "Debugging With Gdb"
#1800 opened Sep 9, 2024 by hirooih Loading…
Check tcontrol.mte in trigger_t::allow_action()
#1777 opened Aug 16, 2024 by rtwfroody Loading…
15
Vector crypto additional
#1748 opened Jul 25, 2024 by nibrunieAtSi5 • Draft
medeleg: the third bit(CAUSE_BREAKPOINT) of medeleg is unwritable when Sdtrig exist.
#1742 opened Jul 23, 2024 by NewPaulWalker Loading…
6
hvip: Correct logging value of mip on writing hvip
#1741 opened Jul 23, 2024 by YenHaoChen Loading…
Update mcontrol6 to support version 1.0
#1667 opened May 14, 2024 by rtwfroody Loading…
4
AIA: Implement Smaia/Ssaia extension
#1635 opened Mar 29, 2024 by YenHaoChen Loading…
3
don't read CSR in csrrw(i) with rd=0
#1628 opened Mar 19, 2024 by ShengMingTangAndes Loading…
1
Adjust wide_counter_csr_t::written_value() to only increment if counting is enabled, Bug Fix for PR 1381
#1581 opened Jan 24, 2024 by rbuchner-aril Loading…
Provide accessibility control of xcontext CSRs through stateen0[57] CSR
#1550 opened Dec 25, 2023 by YenHaoChen Loading…
UB in negate in mulh/mulhsu
#1546 opened Dec 21, 2023 by nibrunieAtSi5 • Draft
4
Remove in-tree libfdt, rely on system-installed libfdt
#1536 opened Dec 12, 2023 by jerryz123 • Draft
Add Ssdtso support
#1501 opened Nov 13, 2023 by cmuellner Loading…
1
[vector-crypto] Fixing Zvkb/Zvbb distinction
#1474 opened Sep 29, 2023 by nibrunieAtSi5 Loading…
9
fix: mcontrol/mcontrol6 on fetch
#1459 opened Sep 13, 2023 by YenHaoChen Loading…
9
use correct sstatten csr number
#1445 opened Aug 25, 2023 by chihminchao Loading…
4
Specify -march and -mabi in README.md example
#1362 opened May 18, 2023 by MarekVCodasip Loading…
3
triggers: implement {mcontrol,mcontrol6}.match = {not equal,not napot,not mask low,not mask high}
#1348 opened May 4, 2023 by YenHaoChen Loading…
3
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