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Minor style fixes #476

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merged 1 commit into from
May 23, 2024
Merged

Minor style fixes #476

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1 change: 0 additions & 1 deletion model/riscv_fetch.sail
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,6 @@

function isRVC(h : half) -> bool = not(h[1 .. 0] == 0b11)

val fetch : unit -> FetchResult
function fetch() -> FetchResult =
/* fetch PC check for extensions: extensions return a transformed PC to fetch,
* but any exceptions use the untransformed PC.
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7 changes: 3 additions & 4 deletions model/riscv_step.sail
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Expand Up @@ -33,8 +33,7 @@ function step(step_no : int) -> bool = {
},
None() => {
/* the extension hook interposes on the fetch result */
let f : FetchResult = ext_fetch_hook(fetch());
match f {
match ext_fetch_hook(fetch()) {
/* extension error */
F_Ext_Error(e) => {
ext_handle_fetch_check_error(e);
Expand All @@ -57,10 +56,10 @@ function step(step_no : int) -> bool = {
if haveRVC() then {
nextPC = PC + 2;
(execute(ast), true)
} else {
} else {
handle_illegal();
(RETIRE_FAIL, true)
}
}
},
F_Base(w) => {
instbits = zero_extend(w);
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