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Improvements and fixes for AMD SOF stack #4500

Merged
merged 7 commits into from
Aug 7, 2023
Merged

Improvements and fixes for AMD SOF stack #4500

merged 7 commits into from
Aug 7, 2023

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vijendarmukunda
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This series contains few improvements and fixes for existing AMD SOF stack

@vijendarmukunda
ASoC: SOF: amd: remove unused sha dma interrupt code
b1c9ed4 
During initial development time for RN platform, when SHA
dma gets completed, SHA DMA engine used to raise the ACP interrupt.
In ACP interrupt handler, SHA DMA interrupt got handled.
Currently SHA DMA compleition is verified by checking
transfer count using read poll time out logic.
Remove unused SHA dma interrupt handling code.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
ASoC: SOF: amd: enable ACP external global interrupt
d80f6de 
Previously ACP SOF firmware used to enable the ACP external
global interrupt register.
This will restrict to report ACP host interrupts only after
firmware loading is successful.
This register needs to be set from host driver to handle
other ACP interrupts(SoundWire Interrupts) before loading
the ACP firmware.

Add field for external interrupt enable register in acp descriptor
structure and enable the external interrupt enable register.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
ASoC: SOF: amd: add module parameter for firmware debug
626c1e3 
Add module parameter for firmware debug. If firmware debug
flag is enabled, clear the fusion stall bit which is required
for enabling firmware debugging through JTAG.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
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@plbossart , @ranj063 : Could you please review this PR ?

plbossart
plbossart previously approved these changes Aug 4, 2023
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LGTM - with my complete ignorance of what the hardware is :-)

ranj063
ranj063 reviewed Aug 4, 2023
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@vijendarmukunda
ASoC: SOF: amd: remove redundant clock mux selection register write
726212a 
ACP clock mux selection register is already programmed during acp init
sequence.
Remove the redundant register write.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
ASoC: SOF: amd: add conditional check for acp_clkmux_sel register
30b4f17 
Few AMD platforms require ACP ACLK as clock source.
Add conditional check for clock mux selection register for
switching between internal clock and ACP ACLK.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
ASoC: SOF: amd: clear panic mask status when panic occurs
01d223a 
Due to scratch memory persistence, Once the DSP panic is reported, need to
clear the panic mask after handling DSP panic. Otherwise, It results in DSP
panic on next reboot.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
ASoC: SOF: amd: clear dsp to host interrupt status
61454e0 
DSP_SW_INTR_STAT_OFFSET is a common interrupt register which will be
accessed by both ACP firmware and driver. This register contains register
bits corresponds to host to dsp interrupts and vice versa.

when dsp to host interrupt is reported, only clear dsp to host
interrupt bit in DSP_SW_INTR_STAT_OFFSET.

Fixes: 2e7c665 ("ASoC: SOF: amd: Fix for handling spurious interrupts from DSP")

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
@vijendarmukunda
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Posted V2 version.

  • Fix typo in Commit message.
  • In amd_sof_acp_resume() API directly add "return acp_memory_init(sdev)" instead of ret.

@plbossart plbossart merged commit d414316 into thesofproject:topic/sof-dev Aug 7, 2023
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@plbossart
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@vijendarmukunda @bhiregoudar there's a significant backlog of AMD-related patches we carry on the topic/sof-dev-rebase branch:

60da4f0 ASoC: SOF: amd: Add sof support for vangogh platform
341c13b ASOC: SOF: amd : Add support for signed fw image loading
3db9294 ASoC: SOF: amd: Enable signed firmware image loading for Vangogh platform
5fe6bab ASoC: SOF: amd: remove unused sha dma interrupt code
ba6161f ASoC: SOF: amd: enable ACP external global interrupt
1bf0d79 ASoC: SOF: amd: add module parameter for firmware debug
25e9ada ASoC: SOF: amd: remove redundant clock mux selection register write
a29f78a ASoC: SOF: amd: add conditional check for acp_clkmux_sel register
639950d ASoC: SOF: amd: clear panic mask status when panic occurs
9e475b7 ASoC: SOF: amd: clear dsp to host interrupt status

Can you send them upstream please?

@bhiregoudar
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@vijendarmukunda @bhiregoudar there's a significant backlog of AMD-related patches we carry on the topic/sof-dev-rebase branch:

60da4f0 ASoC: SOF: amd: Add sof support for vangogh platform 341c13b ASOC: SOF: amd : Add support for signed fw image loading 3db9294 ASoC: SOF: amd: Enable signed firmware image loading for Vangogh platform 5fe6bab ASoC: SOF: amd: remove unused sha dma interrupt code ba6161f ASoC: SOF: amd: enable ACP external global interrupt 1bf0d79 ASoC: SOF: amd: add module parameter for firmware debug 25e9ada ASoC: SOF: amd: remove redundant clock mux selection register write a29f78a ASoC: SOF: amd: add conditional check for acp_clkmux_sel register 639950d ASoC: SOF: amd: clear panic mask status when panic occurs 9e475b7 ASoC: SOF: amd: clear dsp to host interrupt status

Can you send them upstream please?

Thanks, we will send them upstream.

@vijendarmukunda
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Pushed below patches for upstream review.
60da4f0 ASoC: SOF: amd: Add sof support for vangogh platform
341c13b ASOC: SOF: amd : Add support for signed fw image loading
3db9294 ASoC: SOF: amd: Enable signed firmware image loading for Vangogh platform
once it got merged we will push rest of the patch series

@vijendarmukunda
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@plbossart : all pending patches got merged in to ASoC tree.

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@bhiregoudar bhiregoudar bhiregoudar approved these changes

@ranj063 ranj063 ranj063 approved these changes

@sunilkumardommati sunilkumardommati Awaiting requested review from sunilkumardommati

@plbossart plbossart Awaiting requested review from plbossart

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4 participants
@vijendarmukunda @plbossart @bhiregoudar @ranj063