一个FPGA核心板设计,体积小、低成本、易用、扩展性强。
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Updated
Sep 14, 2023 - Verilog
一个FPGA核心板设计,体积小、低成本、易用、扩展性强。
Simple handmade open source mobile phone
Intel Quartus Prime Synthesis Engine for Docker
Async-Karin is an asynchronous framework for FPGA written in Verilog. It has been tested on a Xilinx Artix-7 board and an Altera Cyclone-IV board.
This is a Quartus Prime FPGA project testing the functionality of the LogiFind Altera Cyclone IV EP4CE6E22C8N Development Board. This product can also be found on eBay where I bought it from. I hope to provide base code that will help others in their learning with this development board.
Ejemplos de codigo con implementación en hardware para la tarjeta Cyclone IV lenguaje VHDL
Examples, projects and free modules for Cyclone IV (Omdazz)
FPGA labworks for RZ-easyFPGA devboard (Cyclone IV)
Source files for SiFive's Freedom platforms (port to Zeowaa board with Cyclone 4 chip: see intel-zeowaa branch)
Hardware Praktikum at Uni Freiburg
A place to save my fpga projects while learning the basics
A set of additional non-official demo projects for Cyclone4 (EP4CE15F23C8) core boards
Verilog RISC Processor Design
Konfiguracja układu FPGA (Intel Cyclone IV EP4CE6E22C8, na płytce RZ-EasyFPGA) do wyświetlania cyfry i stałych znaków na wyświetlaczy 7-segmentowym cztero-pozycyjnym. Z powodu połączenia wyprowadzeń wyświetlacza (wspólna katoda), konieczne było zastosowanie "przemiatania" znaków i cyfr.
A basic set of resources to help you get started with the commonly available and cheap AliExpress Altera Cyclone IV EP4CE6E22C8 FPGA Core Boards. No warranty expressed or implied.
System for Cyclone IV FPGA dev board that consist of RISC-V CPU, custom OS, DMA, controllers and drivers for peripherals.
Some school projects in VHDL
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