Systolic arrays graphical simulator (SAGS), written in Python.

This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times faster than a software running the same algorithm.

Visual representation of how systolic arrays made in Unity3d. (Just code)

A general framework for optimizing DNN dataflow on systolic array

EE599 Accelerated Computing on FPGA

Systolic-array based Deep Learning Accelerator generator

A general framework for optimizing DNN dataflow on systolic array

Template for project1 TPU

A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.

Systolic Networks in Clash

This is an unfinished test model of CNN, based on cnn.h5 Keras pretrained model EN10/KerasMNIST@4ef71d6/cnn.h5 .

Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis

In this repository you can find all of my projects for Parallel Processing Course when I was in 2nd semester of my master's at SUT.

AutoSA: Polyhedral-Based Systolic Array Compiler

SystemVerilog module for matrix multiplication

Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis

Deep learning accelerator architectures requiring half the multipliers

Analytical modeling tool for CNNs running on array-based accelerators.

Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit

Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)