Skip to content
/ AES Public

๐Ÿ” Hardware Implementation Of AES Algorithm in Verilog HDL

Notifications You must be signed in to change notification settings

yasnakateb/AES

Folders and files

NameName
Last commit message
Last commit date

Latest commit

ย 

History

3 Commits
ย 
ย 
ย 
ย 
ย 
ย 
ย 
ย 
ย 
ย 
ย 
ย 

Repository files navigation

Advanced Encryption Standard

The Advanced Encryption Standard (AES) is a symmetric block cipher to encrypt sensitive data. This implementation supports a 128-bit key. AES-128 bit requires 10 rounds to complete the full operation. The input data is 128 bits and the input key is also 128-bit and each round requires 1 cycle to complete.

The schematic of AES structure

Steps

  • Add round key

  • Substitute bytes

  • Shift rows

  • Mix columns

Building on macOS

  1. Icarus-Verilog can be installed via Homebrew : $ brew install icarus-verilog

  2. Download Scansion from here.

  3. Clone the repository.

  4. Run $ make and type MIPS code to see it in binary form in rams_init_file.hex file.

  5. $ make simulate will:

  • compile design+TB
  • simulate the verilog design
  1. $ make display will:
  • display waveforms.