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driver: loapic: add DTS binding for local APIC #60114

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nisarumar
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As highlighted in #26393, local APIC still used Kconfig based CONFIG_LOAPIC_BASE_ADDRESS. This patch set adds DTS support to local APIC. I/O APIC already uses DTS. Similar to I/O APIC:

  • I have added a device tree entry in the relevant .dtsi files.
  • I have also added a binding for rules.

Several Intel x86 architecture define a maximum set of LVT entries for local APIC, hence the reason for adding num-irqs.

As per zephyrproject-rtos#26393, Local APIC is using Kconfig based option for
the base address. This patch adds DTS binding support in the driver,
just like its conunter part I/O APIC.

Signed-off-by: Umar Nisar <umarnisar@outlook.com>
Adjust the formatting of the patch submitted (spac -> tabs)

Signed-off-by: Umar Nisar <umarnisar@outlook.com>
fix formatting of the patch (space -> tab) for
modified sections

Signed-off-by: Umar Nisar <umarnisar@outlook.com>
fix formatting for the modified section of the
file (spaces -> tab)

Signed-off-by: Umar Nisar <umarnisar@outlook.com>
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Hello @nisarumar, and thank you very much for your first pull request to the Zephyr project!

A project maintainer just triggered our CI pipeline to run it against your PR and ensure it's compliant and doesn't cause any issues. You might want to take this opportunity to review the project's Contributor Expectations and make any updates to your pull request if necessary. 😊

@nisarumar nisarumar closed this Jul 6, 2023
@kartben
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kartben commented Jul 7, 2023

Hi @nisarumar, and thanks for the PR! Just checking that you didn't close this by accident?

@nisarumar
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Hi @kartben,
No this was not by accident. It was failing some test. I will check and re-open soon. Thanks for checking in.

@kartben
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kartben commented Jul 7, 2023

Gotcha! Feel free to leave the PR in Draft state to iterate on it and get CI to run and provide feedback, and only put it out of draft when it's ready for review. Cheers!

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area: Devicetree Binding PR modifies or adds a Device Tree binding area: Interrupt Controller area: X86 x86 Architecture (32-bit) platform: X86 x86 and x86-64
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4 participants