drivers: spi: spi_nrfx_spim: Add CPOL handling on SCK pin #61294
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Pin state after SPIM deinitialization is based on pinctrl configuration. On the other hand, CPOL is set during runtime. With the introduction of the power-optimized SPIM driver, it disables the peripheral instance once the transfer is completed. As a result, the GPIO takes control over the SCK pin and drives it based on pinctrl configuration which causes an invalid SCK state when the transaction is configured with CPOL (Clock Polarity).
To address this issue, a patch was introduced to the SPIM driver. Now, when a SPIM instance is configured with CPOL, the driver is setting in the runtime the correct state of the SCK pin.
The PR addresses concerns in the comment #61280 (comment) placed in PR with another solution to CPOL handling on SCK pin.