soc: intel_adsp: replace icache ISR workaround with custom idle solution #71332
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
|
Keeping as draft until SOF CI test run at thesofproject/sof#9022 is complete. I've been testing with older versions where the original issue is easier to hit. This additional test round is probably more important to ensure there are no unintended side-effects from this implementation. |
A workaround to avoid icache corruption was added in commit be881d4 ("arch: xtensa: add isync to interrupt vector"). This patch implements a different workaround by adding custom logic to idle entry on affected Intel ADSP platforms. To safely enter "waiti" when clock gating is enabled, we need to ensure icache is both unlocked and invalidated upon entry. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
kv2019i
force-pushed
the
202404-isync-alt-fix
branch
from
bfac89e
to
b156cf7
Compare
zephyrbot
requested review from
andyross,
ceolin,
dcpleung,
jxstelter,
lgirdwood,
lyakh,
marc-hb,
marcinszkudlinski and
softwarecki
kv2019i
requested review from
teburd,
tejlmand,
abonislawski,
serhiy-katsyuba-intel and
dcpleung
and removed request for
lyakh,
lgirdwood,
dcpleung,
marc-hb,
jxstelter and
softwarecki
|
SOF side test run passes, marking ready for review. |
serhiy-katsyuba-intel
approved these changes
Apr 11, 2024
tmleman
approved these changes
Apr 11, 2024
dcpleung
approved these changes
Apr 11, 2024
teburd
approved these changes
Apr 11, 2024
|
For reference, a larger test plan completed on Intel side with test id 39699 with all tests passing. |
softwarecki
approved these changes
Apr 15, 2024
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
A workaround to avoid icache corruption was added in commit be881d4 ("arch: xtensa: add isync to interrupt vector").
This patch implements a different workaround by adding custom logic to idle entry on affected Intel ADSP platforms. To safely enter "waiti" when clock gating is enabled, we need to ensure icache is both unlocked and invalidated upon entry.