sync

src/main/scala/vexiiriscv/Param.scala

@@ -297,12 +297,12 @@ class ParamSimple(){
     opt[Unit]("with-lsu-l1") action { (v, c) => lsuL1Enable = true }
     opt[Unit]("fetch-l1") action { (v, c) => fetchL1Enable = true }
     opt[Unit]("lsu-l1") action { (v, c) => lsuL1Enable = true }
-    opt[Int]("fetch-l1-sets") action { (v, c) => fetchL1Sets = v }
-    opt[Int]("fetch-l1-ways") action { (v, c) => fetchL1Ways = v }
+    opt[Int]("fetch-l1-sets") unbounded() action { (v, c) => fetchL1Sets = v }
+    opt[Int]("fetch-l1-ways") unbounded() action { (v, c) => fetchL1Ways = v }
     opt[Int]("fetch-l1-mem-data-width-min") action { (v, c) => fetchMemDataWidthMin = v }
     opt[Unit]("fetch-reduced-bank") action { (v, c) => fetchL1ReducedBank = true }
-    opt[Int]("lsu-l1-sets") action { (v, c) => lsuL1Sets = v }
-    opt[Int]("lsu-l1-ways") action { (v, c) => lsuL1Ways = v }
+    opt[Int]("lsu-l1-sets") unbounded() action { (v, c) => lsuL1Sets = v }
+    opt[Int]("lsu-l1-ways") unbounded() action { (v, c) => lsuL1Ways = v }
     opt[Int]("lsu-l1-store-buffer-slots") action { (v, c) => lsuStoreBufferSlots = v }
     opt[Int]("lsu-l1-store-buffer-ops") action { (v, c) => lsuStoreBufferOps = v }
     opt[Int]("lsu-l1-refill-count") action { (v, c) => lsuL1RefillCount = v }

src/main/scala/vexiiriscv/soc/litex/Soc.scala

@@ -348,10 +348,20 @@ object PythonArgsGen extends App{
 
 /*
 
+# Debian 4C
 python3 -m litex_boards.targets.digilent_nexys_video --cpu-type=vexiiriscv --cpu-variant=debian --with-jtag-tap  --bus-standard axi-lite \
 --vexii-args="--performance-counters 9 --regfile-async --lsu-l1-store-buffer-ops=32 --lsu-l1-refill-count 2 --lsu-l1-writeback-count 2 --lsu-l1-store-buffer-slots=2" \
 --cpu-count=4 --with-jtag-tap  --with-video-framebuffer --l2-self-flush=40c00000,40DD4C00,1666666  --with-sdcard --with-ethernet --with-coherent-dma --l2-byte=262144  --sys-clk-freq 100000000 \
 --update-repo=no --soc-json build/csr.json --build   --load
+
+# Debian 4C perf
+python3 -m litex_boards.targets.digilent_nexys_video --cpu-type=vexiiriscv --cpu-variant=debian --with-jtag-tap  --bus-standard axi-lite \
+--vexii-args="--performance-counters 9 --regfile-async --lsu-l1-store-buffer-ops=32 --lsu-l1-refill-count 2 --lsu-l1-writeback-count 2 --lsu-l1-store-buffer-slots=2 --stressed-btb --with-store-rs2-late" \
+--cpu-count=4 --with-jtag-tap  --with-video-framebuffer --l2-self-flush=40c00000,40DD4C00,1666666  --with-sdcard --with-ethernet --with-coherent-dma --l2-byte=262144  --sys-clk-freq 100000000 \
+--update-repo=no --soc-json build/csr.json --build
+
+
+
 python3 -m litex.tools.litex_json2dts_linux build/csr.json --root-device=mmcblk0p2 > build/linux.dts
 dtc -O dtb -o build/linux.dtb build/linux.dts
 
@@ -655,6 +665,29 @@ TODO debug :
 [ 9576.286235] [<ffffffff80002f76>] ret_from_exception+0x0/0xc
 [ 9576.295073] [<ffffffff80144a98>] do_sys_poll+0x144/0x42c
 
+perf stat  --timeout 1000 -e r12,r13,r1a,r1b,stalled-cycles-frontend,stalled-cycles-backend,cycles,instructions,branch-misses,branches -p 532
+
+relaxed btb =>
+Startup finished in 9.108s (kernel) + 1min 17.848s (userspace) = 1min 26.956s
+graphical.target reached after 1min 13.470s in userspace.
+timed 5026 gametics in 9474 realtics (18.567659 fps)
+
+stressed btb + late store
+Startup finished in 8.510s (kernel) + 1min 11.652s (userspace) = 1min 20.162s
+graphical.target reached after 1min 10.586s in userspace.
+timed 5026 gametics in 8885 realtics (19.798536 fps)
+12084250      stalled-cycles-frontend          #   14.50% frontend cycles idle
+16944058      stalled-cycles-backend           #   20.33% backend cycles idle
+
+stressed btb + late alu + late store
+Startup finished in 9.098s (kernel) + 1min 9.677s (userspace) = 1min 18.776s
+graphical.target reached after 1min 8.574s in userspace.
+
+16 KB i$d$ relaxed btb
+Startup finished in 8.219s (kernel) + 1min 5.727s (userspace) = 1min 13.946s
+graphical.target reached after 1min 4.705s in userspace.
+timed 5026 gametics in 8999 realtics (19.547728 fps
+
 SLICE_X122Y49        FDRE (Prop_fdre_C_Q)         0.456    11.240 r  VexiiRiscvLitex_2f3ff2b95842595a3b7d75e26dfd301e/vexiis_1_logic_core/vexiis_1_logic_core_toplevel_execute_ctrl1_up_float_RS2_lane0_reg[52]/Q
                      net (fo=7, routed)           0.824    12.064    VexiiRiscvLitex_2f3ff2b95842595a3b7d75e26dfd301e/vexiis_1_logic_core/FpuUnpack_RS2_f64_exponent[0]
 SLICE_X133Y48        LUT3 (Prop_lut3_I0_O)        0.124    12.188 r  VexiiRiscvLitex_2f3ff2b95842595a3b7d75e26dfd301e/vexiis_1_logic_core/FpuAddSharedPlugin_logic_pip_node_1_inserter_rs2_exponent[4]_i_3__0/O