west.yml: update zephyr to b2f7ea0523 #8268

tmleman · 2023-09-26T21:26:15Z

Zepych update: total of 763 commits.

492517b918 west.yml: Update NXP HAL SDK to 2.14
a5d1fd9857 soc: adsp: clk: update clock switch flow
9656056b19 dts: adsp: ace20: remove lp clock
50f0e223e8 dts: adsp: ace15: remove lp clock
cf6d5f95b6 adsp: clk: ace: select ipll if wovrco is unavailable
2d835e1b29 dts: adsp: ace20: replace hp with ipll clock
dcecda859c dts: adsp: ace15: replace hp with ipll clock
2f2689e3d3 intel_adsp: ace15: shim: update wovrco request bit
ea9dd59460 yamllint: bindings: add ipll clock index
1ddabfa8d8 dai: intel: dmic: fix shadow variable
b26921d776 dai: intel: dmic: New functions for writing fir coefficients
cba9ec10c3 dai: intel: tgl: dmic: Refactor of dai_nhlt_dmic_dai_params_get function
c28e8ba9ba dai: intel: dmic: Add pdm_base and pdm_idx variables in blob parser
2452aaad50 dai: intel: dmic: Separate fir configuration code into function
f74fd8edaf dai: intel: ace: dmic: Add dai_dmic_start_fifo_packers function
76d03e798f dai: intel: ace: dmic: Using the WAIT_FOR macro in waiting functions
3fbaed4de9 dai: intel: ace: dmic: Refactor of dai_nhlt_dmic_dai_params_get function
d7672af838 dai: intel: dmic: Combine PDM registers definitions
8ea53d49b6 dai: intel: dmic: nhlt: Move debug print code to a separate functions
81944c5c62 dai: intel: dmic: Move definitions of nhlt structures to a new file

This patch adds CPU_LOWEST_FREQ_IDX definition to keep compliance with changes in base_fw. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

This patch is changing value of slow clock in response for FwConfigGet from LP clock to the lowest clock is section "slow clock". Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

ACE_1.5 and ACE_2.0 use only two clocks for DSP cores. First is WOVRCO and second is ACE IPLL. IPLL allows to configure it to work like LP RING Oscillator Clock or HP RING Oscillator Clock. Currently, the driver does not allow this, so I remove the frequency that cannot be achieved anyway. Clocks frequencies: WOV: 38.4 MHz IPLL: 393.216 MHz Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

Changing max clock frequency for FPGA configuration. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

Zepych update: total of 736 commits. 492517b918 west.yml: Update NXP HAL SDK to 2.14 a5d1fd9857 soc: adsp: clk: update clock switch flow 9656056b19 dts: adsp: ace20: remove lp clock 50f0e223e8 dts: adsp: ace15: remove lp clock cf6d5f95b6 adsp: clk: ace: select ipll if wovrco is unavailable 2d835e1b29 dts: adsp: ace20: replace hp with ipll clock dcecda859c dts: adsp: ace15: replace hp with ipll clock 2f2689e3d3 intel_adsp: ace15: shim: update wovrco request bit ea9dd59460 yamllint: bindings: add ipll clock index 1ddabfa8d8 dai: intel: dmic: fix shadow variable b26921d776 dai: intel: dmic: New functions for writing fir coefficients cba9ec10c3 dai: intel: tgl: dmic: Refactor of dai_nhlt_dmic_dai_params_get function c28e8ba9ba dai: intel: dmic: Add pdm_base and pdm_idx variables in blob parser 2452aaad50 dai: intel: dmic: Separate fir configuration code into function f74fd8edaf dai: intel: ace: dmic: Add dai_dmic_start_fifo_packers function 76d03e798f dai: intel: ace: dmic: Using the WAIT_FOR macro in waiting functions 3fbaed4de9 dai: intel: ace: dmic: Refactor of dai_nhlt_dmic_dai_params_get function d7672af838 dai: intel: dmic: Combine PDM registers definitions 8ea53d49b6 dai: intel: dmic: nhlt: Move debug print code to a separate functions 81944c5c62 dai: intel: dmic: Move definitions of nhlt structures to a new file Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

tmleman · 2023-09-27T11:05:09Z

Known issues:

checkpatch: commit titles for dmic in zephyr are too long, but I would keep them in original form.
build-linux (-d, mnfst, mtl) e.t.c: issue already fixed.

I can't tell how serious are those fails 1 2 but it doesn't look bad.

tmleman · 2023-09-27T11:10:40Z

@lgirdwood internal CI is passing in this configuration

@iuliana-prodan fyi

iuliana-prodan · 2023-09-27T11:58:42Z

@lgirdwood internal CI is passing in this configuration

@iuliana-prodan fyi

Great! Thanks @tmleman
Let's merge this :)

lgirdwood · 2023-09-27T12:39:36Z

@tmleman I'm seeing a build error in some CI configs

zephyr/CMakeFiles/zephyr.dir/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c.obj.d -o zephyr/CMakeFiles/zephyr.dir/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c.obj -c /zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c
In file included from /zep_workspace/zephyr/include/zephyr/sys/mem_manage.h:104,
                 from /zep_workspace/zephyr/include/zephyr/sys/device_mmio.h:47,
                 from /zep_workspace/zephyr/include/zephyr/device.h:15,
                 from /zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp.h:17,
                 from /zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c:23:
/zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: In function 'sys_mm_drv_mm_init':
/zep_workspace/zephyr/include/zephyr/sys/__assert.h:44:52: error: format '%p' expects argument of type 'void *', but argument 2 has type 'long unsigned int' [-Werror=format=]
   44 | #define __ASSERT_MSG_INFO(fmt, ...) __ASSERT_PRINT("\t" fmt "\n", ##__VA_ARGS__)
      |                                                    ^~~~
/zep_workspace/zephyr/include/zephyr/sys/__assert.h:36:47: note: in definition of macro '__ASSERT_PRINT'
   36 | #define __ASSERT_PRINT(fmt, ...) assert_print(fmt, ##__VA_ARGS__)
      |                                               ^~~
/zep_workspace/zephyr/include/zephyr/sys/__assert.h:118:25: note: in expansion of macro '__ASSERT_MSG_INFO'
  118 |                         __ASSERT_MSG_INFO(fmt, ##__VA_ARGS__);            \
      |                         ^~~~~~~~~~~~~~~~~
/zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c:669:17: note: in expansion of macro '__ASSERT'
  669 |                 __ASSERT(false,
      |                 ^~~~~~~~
cc1: all warnings being treated as errors
[80/384] Linking C static library zephyr/arch/common/libarch__common.a
[81/384] Building ASM object zephyr/arch/arch/xtensa/core/CMakeFiles/arch__xtensa__core.dir/wind

tmleman · 2023-09-27T13:51:55Z

@tmleman I'm seeing a build error in some CI configs

zephyr/CMakeFiles/zephyr.dir/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c.obj.d -o zephyr/CMakeFiles/zephyr.dir/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c.obj -c /zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c
In file included from /zep_workspace/zephyr/include/zephyr/sys/mem_manage.h:104,
                 from /zep_workspace/zephyr/include/zephyr/sys/device_mmio.h:47,
                 from /zep_workspace/zephyr/include/zephyr/device.h:15,
                 from /zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp.h:17,
                 from /zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c:23:
/zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: In function 'sys_mm_drv_mm_init':
/zep_workspace/zephyr/include/zephyr/sys/__assert.h:44:52: error: format '%p' expects argument of type 'void *', but argument 2 has type 'long unsigned int' [-Werror=format=]
   44 | #define __ASSERT_MSG_INFO(fmt, ...) __ASSERT_PRINT("\t" fmt "\n", ##__VA_ARGS__)
      |                                                    ^~~~
/zep_workspace/zephyr/include/zephyr/sys/__assert.h:36:47: note: in definition of macro '__ASSERT_PRINT'
   36 | #define __ASSERT_PRINT(fmt, ...) assert_print(fmt, ##__VA_ARGS__)
      |                                               ^~~
/zep_workspace/zephyr/include/zephyr/sys/__assert.h:118:25: note: in expansion of macro '__ASSERT_MSG_INFO'
  118 |                         __ASSERT_MSG_INFO(fmt, ##__VA_ARGS__);            \
      |                         ^~~~~~~~~~~~~~~~~
/zep_workspace/zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c:669:17: note: in expansion of macro '__ASSERT'
  669 |                 __ASSERT(false,
      |                 ^~~~~~~~
cc1: all warnings being treated as errors
[80/384] Linking C static library zephyr/arch/common/libarch__common.a
[81/384] Building ASM object zephyr/arch/arch/xtensa/core/CMakeFiles/arch__xtensa__core.dir/wind

This is already fixed by @dbaluta but the zephyr update will not include this patch.

dbaluta · 2023-09-27T15:20:02Z

@tmleman so can we merge this ? and then you will later do another zephyr sha update?

tmleman · 2023-09-27T19:05:04Z

@tmleman so can we merge this ? and then you will later do another zephyr sha update?

2 x Yes

tmleman added 5 commits September 26, 2023 23:17

platform: posix: clk: add lowest freq index

56eb8c2

This patch adds CPU_LOWEST_FREQ_IDX definition to keep compliance with changes in base_fw. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

base_fw: get fw config

ef28f9a

This patch is changing value of slow clock in response for FwConfigGet from LP clock to the lowest clock is section "slow clock". Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

ace: overlay: update clock frequency

76eea44

Changing max clock frequency for FPGA configuration. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

tmleman mentioned this pull request Sep 26, 2023

west.yml: update Zephyr to ca3310145f8f #8264

Closed

tmleman marked this pull request as ready for review September 27, 2023 10:49

tmleman requested review from lgirdwood, plbossart, mmaka1, lbetlej, dbaluta and kv2019i as code owners September 27, 2023 10:49

tmleman requested review from abonislawski and marcinszkudlinski September 27, 2023 11:08

marcinszkudlinski approved these changes Sep 27, 2023

View reviewed changes

iuliana-prodan approved these changes Sep 27, 2023

View reviewed changes

tmleman mentioned this pull request Sep 27, 2023

intel_adsp: ace: cpu clock management #8182

Closed

1 task

lgirdwood approved these changes Sep 27, 2023

View reviewed changes

dbaluta merged commit 48259d8 into thesofproject:main Sep 28, 2023
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west.yml: update zephyr to b2f7ea0523 #8268

west.yml: update zephyr to b2f7ea0523 #8268

tmleman commented Sep 26, 2023

tmleman commented Sep 27, 2023

tmleman commented Sep 27, 2023

iuliana-prodan commented Sep 27, 2023 •

edited

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lgirdwood commented Sep 27, 2023

tmleman commented Sep 27, 2023

dbaluta commented Sep 27, 2023

tmleman commented Sep 27, 2023

west.yml: update zephyr to b2f7ea0523 #8268

west.yml: update zephyr to b2f7ea0523 #8268

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tmleman commented Sep 26, 2023

tmleman commented Sep 27, 2023

tmleman commented Sep 27, 2023

iuliana-prodan commented Sep 27, 2023 • edited Loading

lgirdwood commented Sep 27, 2023

tmleman commented Sep 27, 2023

dbaluta commented Sep 27, 2023

tmleman commented Sep 27, 2023

iuliana-prodan commented Sep 27, 2023 •

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