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HW: Add axi_isolate at the cluster interface + control ports for iso lint #367: Commit aa9e2cc pushed by Lore0599
September 20, 2024 16:41 50s lleone/pmu
lleone/pmu
September 20, 2024 16:41 50s
HW: Add Isolation control in the testbench lint #366: Commit c5b8040 pushed by Lore0599
September 20, 2024 16:41 1m 1s lleone/pmu
lleone/pmu
September 20, 2024 16:41 1m 1s
Sim: 🎨 Fix testbench codestyle lint #365: Commit 2864375 pushed by sermazz
September 20, 2024 16:22 51s smazzola/hyperbus
smazzola/hyperbus
September 20, 2024 16:22 51s
Sim: Integrate HyperRAM VIP in Chimera tb (HyperBus still not in SoC) lint #364: Commit d2967a1 pushed by sermazz
September 20, 2024 16:19 1m 9s smazzola/hyperbus
smazzola/hyperbus
September 20, 2024 16:19 1m 9s
Sim: Integrate HyperRAM VIP in Chimera testbench (HyperBus still not … lint #363: Commit 58d8cb8 pushed by sermazz
September 20, 2024 16:19 58s smazzola/hyperbus
smazzola/hyperbus
September 20, 2024 16:19 58s
HW: Add axi_isolate at the cluster interface + control ports for iso lint #362: Commit 7a25cfd pushed by Lore0599
September 20, 2024 15:24 1m 2s lleone/pmu
lleone/pmu
September 20, 2024 15:24 1m 2s
Hw: fixed axi_isolate TerminateTransaction parameter lint #361: Commit 8450434 pushed by Lore0599
September 20, 2024 15:24 58s lleone/pmu
lleone/pmu
September 20, 2024 15:24 58s
HW: Add axi_isolate at the cluster interface + control ports for iso lint #360: Commit 9c2df57 pushed by Lore0599
September 20, 2024 15:23 1m 0s lleone/pmu
lleone/pmu
September 20, 2024 15:23 1m 0s
Makefile: Integrate HyperRAM VIP in build flow lint #359: Commit 3c376b0 pushed by sermazz
September 20, 2024 12:21 1m 1s smazzola/hyperbus
smazzola/hyperbus
September 20, 2024 12:21 1m 1s
Makefile: Integrate HyperRAM VIP in build flow lint #358: Commit 24db13c pushed by sermazz
September 19, 2024 16:46 1m 1s smazzola/hyperbus
smazzola/hyperbus
September 19, 2024 16:46 1m 1s
HW: Add rst for each ecternal cluster to be driven by PMU controller lint #357: Commit 072c324 pushed by Lore0599
September 19, 2024 07:13 59s lleone/pmu
lleone/pmu
September 19, 2024 07:13 59s
HW: Add flattened interface at the cluster interface (#39) lint #356: Commit d17e21e pushed by Lore0599
September 19, 2024 07:09 1m 2s devel
devel
September 19, 2024 07:09 1m 2s
HW: Add flattened interface at the cluster interface lint #355: Commit 135cdad pushed by Lore0599
September 18, 2024 16:03 1m 7s lleone/upf-struct-fix
lleone/upf-struct-fix
September 18, 2024 16:03 1m 7s
Hw: fixed typo in internal structured signals names lint #354: Commit aaebab0 pushed by Lore0599
September 18, 2024 15:57 1m 7s lleone/upf-struct-fix
lleone/upf-struct-fix
September 18, 2024 15:57 1m 7s
HW: Add flattened interface at the cluster interface lint #353: Commit 203f791 pushed by Lore0599
September 18, 2024 15:41 1m 9s lleone/upf-struct-fix
lleone/upf-struct-fix
September 18, 2024 15:41 1m 9s
Hw: Replace APB ports with single port directed to external Cfg Regs … lint #352: Commit 0786599 pushed by Lore0599
September 18, 2024 15:18 1m 0s lleone/upf-struct-fix
lleone/upf-struct-fix
September 18, 2024 15:18 1m 0s
[WIP] hw: Integrate PULP Cluster in Cluster domain (not compiling atm) lint #351: Commit 52e7a01 pushed by sermazz
September 10, 2024 18:26 1m 18s smazzola/pulp-clu
smazzola/pulp-clu
September 10, 2024 18:26 1m 18s
[WIP] hw: Integrate PULP Cluster in Cluster domain (not compiling atm) lint #350: Commit 0da2606 pushed by sermazz
September 10, 2024 15:29 52s smazzola/pulp-clu
smazzola/pulp-clu
September 10, 2024 15:29 52s
HW: Add rst for each ecternal cluster to be driven by PMU controller lint #349: Commit 4fe94d4 pushed by Lore0599
September 9, 2024 14:35 59s lleone/pmu
lleone/pmu
September 9, 2024 14:35 59s
Hw: Add ports for PMU control signals directed towards the Host lint #348: Commit b7c1690 pushed by Lore0599
September 5, 2024 14:34 58s lleone/pmu
lleone/pmu
September 5, 2024 14:34 58s
Hw: Replace APB ports with single port directed to external Cfg Regs … lint #347: Commit 0786599 pushed by Lore0599
September 5, 2024 14:31 59s devel
devel
September 5, 2024 14:31 59s
Hw: Add ports for PMU control signals directed towards the Host lint #346: Commit a115671 pushed by Lore0599
September 5, 2024 11:44 59s lleone/pmu
lleone/pmu
September 5, 2024 11:44 59s
Hw: Replace APB ports with single port directed to external Cfg Regs lint #345: Commit 18ea6e1 pushed by Lore0599
September 5, 2024 09:42 50s lleone/pmu
lleone/pmu
September 5, 2024 09:42 50s
Hw: Replace APB ports with single port directed to external Cfg Regs lint #344: Commit 18ea6e1 pushed by Lore0599
September 4, 2024 13:03 22s lleone/apb-ports
lleone/apb-ports
September 4, 2024 13:03 22s
Fixed APB address width error lint #343: Commit 35ca8e4 pushed by Lore0599
September 4, 2024 13:03 4m 7s lleone/apb-ports
lleone/apb-ports
September 4, 2024 13:03 4m 7s