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sync Scala CI #338: Commit 24725b6 pushed by Dolu1990
July 15, 2024 09:28 3m 21s dev
dev
July 15, 2024 09:28 3m 21s
sync Scala CI #337: Commit 1a92afb pushed by Dolu1990
July 12, 2024 11:56 3m 53s dev
dev
July 12, 2024 11:56 3m 53s
fpu add fpuIgnoreSubnormal (save about 1K lut (64 bits) and quite so… Scala CI #336: Commit ed777de pushed by Dolu1990
July 11, 2024 13:59 3m 27s dev
dev
July 11, 2024 13:59 3m 27s
sync Scala CI #335: Commit b828c85 pushed by Dolu1990
July 11, 2024 08:33 3m 23s dev
dev
July 11, 2024 08:33 3m 23s
Merge pull request #21 from SpinalHDL/prefetch Scala CI #334: Commit ee92608 pushed by Dolu1990
July 10, 2024 07:19 3m 22s dev
dev
July 10, 2024 07:19 3m 22s
Add D$ prefetch support Scala CI #333: Pull request #21 opened by Dolu1990
July 10, 2024 07:19 4m 6s prefetch
prefetch
July 10, 2024 07:19 4m 6s
#20 add support for more than 32 bits physical address via for instan… Scala CI #332: Commit 4d3cd06 pushed by Dolu1990
July 9, 2024 11:24 3m 43s prefetch
prefetch
July 9, 2024 11:24 3m 43s
SpinalHDL sync Scala CI #331: Commit af88c7a pushed by Dolu1990
July 9, 2024 08:34 3m 27s prefetch
prefetch
July 9, 2024 08:34 3m 27s
prefetcher now support strides Scala CI #330: Commit 0d27000 pushed by Dolu1990
July 4, 2024 16:22 4m 0s prefetch
prefetch
July 4, 2024 16:22 4m 0s
rpt prefetch now serialize stuff Scala CI #329: Commit cd53a64 pushed by Dolu1990
July 4, 2024 09:12 3m 39s prefetch
prefetch
July 4, 2024 09:12 3m 39s
prefetcher now has a control CSR Scala CI #328: Commit 203a4df pushed by Dolu1990
July 3, 2024 12:34 4m 0s prefetch
prefetch
July 3, 2024 12:34 4m 0s
Implement mstatus.tw Scala CI #327: Commit e64e869 pushed by Dolu1990
July 3, 2024 07:37 3m 44s prefetch
prefetch
July 3, 2024 07:37 3m 44s
RPT prefetch now replay failed prefetch Scala CI #326: Commit e024ad8 pushed by Dolu1990
July 2, 2024 12:08 3m 21s prefetch
prefetch
July 2, 2024 12:08 3m 21s
Got a first version of RPT prefetcher to work. WIP Scala CI #325: Commit 65b52ce pushed by Dolu1990
July 2, 2024 09:05 3m 32s prefetch
prefetch
July 2, 2024 09:05 3m 32s
fmax: litex soc now forced to keep tilelink timing buffers Scala CI #324: Commit 636acee pushed by Dolu1990
July 1, 2024 12:12 3m 52s prefetch
prefetch
July 1, 2024 12:12 3m 52s
Got very very basic hardware next-line prefetcher to work Scala CI #323: Commit aa38c72 pushed by Dolu1990
June 29, 2024 06:59 3m 23s prefetch
prefetch
June 29, 2024 06:59 3m 23s
cleanup bug fix Scala CI #322: Commit aa49197 pushed by Dolu1990
June 28, 2024 12:36 3m 48s prefetch
prefetch
June 28, 2024 12:36 3m 48s
sync before l1 d$ rework/cleaning Scala CI #321: Commit 8f8b3be pushed by Dolu1990
June 27, 2024 17:11 3m 49s prefetch
prefetch
June 27, 2024 17:11 3m 49s
software prefetcher WIP Scala CI #320: Commit 3746ec1 pushed by Dolu1990
June 27, 2024 10:36 3m 19s prefetch
prefetch
June 27, 2024 10:36 3m 19s
Add prefetch parameters and IntAluPlugin now make from for it. Scala CI #319: Commit 2ceced6 pushed by Dolu1990
June 27, 2024 08:00 3m 37s prefetch
prefetch
June 27, 2024 08:00 3m 37s
Enable MicroOp to have multiple MaskedLiterals Scala CI #318: Commit f83fa46 pushed by Dolu1990
June 27, 2024 07:13 3m 57s prefetch
prefetch
June 27, 2024 07:13 3m 57s
sync Scala CI #317: Commit 7b50ac8 pushed by Dolu1990
June 27, 2024 06:54 3m 30s dev
dev
June 27, 2024 06:54 3m 30s
fix #16 add --pyhsical-width xyz Scala CI #316: Commit 05ed94c pushed by Dolu1990
June 21, 2024 08:10 3m 29s dev
dev
June 21, 2024 08:10 3m 29s
sync Scala CI #315: Commit e991b31 pushed by Dolu1990
June 13, 2024 21:20 3m 32s dev
dev
June 13, 2024 21:20 3m 32s
Add litex axi3 support Scala CI #314: Commit 66974d1 pushed by Dolu1990
June 12, 2024 09:24 3m 52s dev
dev
June 12, 2024 09:24 3m 52s